Single Crystal Silicon Thin Film on Polymer Substrate by Double Layer Transfer Method

We report discovery of new method to transfer a single crystal silicon thin film onto a bendable polymer substrate by using layer transfer process. The method includes creation of mechanically weakened layer 100 nm - 600 nm below the Si wafer surface using boron and hydrogen ion implantations. Silicon mother wafer is then pre-bonded to glass and exfoliated. Exfoliation divides the glass-silicon assembly into weakly bound Si thin film on glass and leftover mother Si wafer. Then the silicon thin film was transferred from glass substrate into a polymer substrate.

Source:IOPscience

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High Oxygen Czochralski Silicon Crystal Growth Relationship to Epitaxial Stacking Faults

With larger diameter Czochralski‐grown silicon crystals an increase in the oxygen content is observed. Oxygen in excess of the solubility limit will precipitate resulting in bulk crystal defects which can modify gettering of impurities known to degrade electrical characteristics. In this study we have investigated crystal growth parameters and related them to the properties of the crystal. Wafers were processed from crystals grown under various conditions. Defect formation was evaluated as a function of processing and related to the crystal properties. By growing 2 in. diam crystals at high seed rotation rates so as to maximize the oxygen content, we were able to suppress saucer etch pit formation and epitaxial stacking fault formation. The high oxygen content crystals behaved in the same manner as 3 in. diam crystals with respect to defect formation.

Source:IOPscience

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Gate-Oxide-Integrity Characteristics of Vacancy-rich Wafer Compared with Crystal-Originated-Pits-free Wafer as a Function of Oxide Thickness

The dielectric breakdown of oxides with various thickness between 5–70 nm on Czochralski (CZ)-grown silicon wafer had been investigated. To observe the effects of crystal-originated-particle (COP), vacancy-rich wafers and COP-free wafers were compared. In breakdown voltage (BV) measurement, breakdown fractions of vacancy-rich wafers were increased with the increase of oxide thickness (tOX) and showed a maximum value at the tOX range of 10–20 nm. On the other hand, COP-free wafers showed few breakdowns over all the range of tOX. Furthermore, time dependent dielectric breakdown (TDDB) of the vacancy-rich wafers showed higher extrinsic breakdowns than that of the COP-free wafers in the tOX below 20 nm. For the intrinsic breakdown, two groups showed the same charge-to-breakdown (QBD) along the strength of injection current over all the range of tOX. Especially, only in case of vacancy-rich wafer, abnormal increase of current, i.e., hump phenomena, was observed in the range of electric field below the Fowler-Nordheim (F-N) tunneling.

Source:IOPscience

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Improvement of the Gate Oxide Integrity by Modifying Crystal Pulling and Its Impact on Device Failures

Czochralski single‐crystal wafers grown with different pulling rates using various hot zone modifications were analyzed with respect to grown‐in defects and gate oxide integrity (GOI). The quality of the wafers characterized by crystal defect density as well as by GOI yield was found to be related strongly with the pulling conditions. Depending on the growth rate two concentric regions, characterized by different GOI and grown‐in defect levels and separated by a ring‐like area with high stacking fault density, were found on the wafers. The single‐bit failure rate in some dynamic random access memory (DRAM) reliability tests turned out to correlate with GOI yield. Thus it is clearly shown that the bulk quality related with crystal pulling conditions correlates with the DRAM reliability.

Source:IOPscience

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Single Crystal Silicon‐on‐Oxide by a Scanning CW Laser Induced Lateral Seeding Process

A 1 μm thick layer of silicon dioxide is grown on selected areas of a {100} silicon wafer such that the resulting silicon dioxide surface is coplanar with the surface of the silicon wafer. A 0.5 μm thick layer of polycrystalline silicon is deposited onto the silicon wafer using a low pressure CVD process. By scanning a focused CW argon laser beam onto the area where the polycrystalline silicon is deposited directly on the exposed silicon substrate, the polycrystalline silicon is converted into an epitaxial layer by a liquid phase process. By scanning the laser beam from the epitaxial region to the region where the polycrystalline silicon is deposited on the silicon dioxide layer, the polycrystalline silicon is converted into a single crystal through a zone melting process, where the previously formed epitaxial layer is used as the seed. This process is named "lateral seeding." It is found that the resulting area of the single crystal on the silicon dioxide layer is dependent on the temperature of the substrate and the crystallographic direction of the edges of the oxide layer. The best results are obtained with a high substrate temperature and with the edges of the oxide layers aligned along a <100> direction. Single crystal regions that extended as much as 80 μm from the epitaxial seed region onto the silicon dioxide region have been obtained. It is inferred from the experimental results that a line‐shaped beam with a flat intensity profile is preferred for improved lateral seeding results.

Source:IOPscience

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Growth of 2 inch ZnO bulk single crystal by the hydrothermal method

Zinc oxide (ZnO) single crystals were grown by the hydrothermal method using a platinum inner container. The 2 inch ZnO wafers obtained from these bulk crystals possess an extremely high crystallinity and purity. The electrical resistivity is highly uniform over the entire wafer area. After annealing, the step-and-terrace structure was observed on the surface of the wafer. The etch pit density was decreased to less than 80 cm−2. These results suggest that these 2 inch ZnO wafers are suitable for wide band gap device applications.

Source:IOPscience

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Method to Reduce Crystal Defects in AlCu Bond Pad

AlCu bond pad crystal defect is observed after wafer processing and before die sawing. It affects wire bonding or bump performance resulting in lower bond pull and ball shear force, even adhesion failure. There are many factors contributing to the crystal defect, such as: polymer removal status, storage condition, humidity and fluorine concentration in the environment etc. Up to date, the impact of humidity and fluorine concentration to crystal defect has been broadly studied, but the polymer remover's effect is somewhat unknown. In this paper, two different chemistry based polymer removers are studied to correlate to crystal defect behavior. After processed by the polymer remover, AlCu bond pad wafers are subject to different environment conditions including wet box (44% and 63% humidity separately). Subsequently, each wet box is filled with fluorine at the concentration of 524ug/pod. The crystal defect growth is examined as a function of time using optical methodology. The results reveal that the polymer chemistry is also critical to crystal defect growth as well as the impact on queue time and storage conditions. An optimized fluoride containing polymer remover can substantially lower the crystal defect risk leading to a wider process windows.

Source:IOPscience

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