Mar 31, 2020

Gate-Oxide-Integrity Characteristics of Vacancy-rich Wafer Compared with Crystal-Originated-Pits-free Wafer as a Function of Oxide Thickness

The dielectric breakdown of oxides with various thickness between 5–70 nm on Czochralski (CZ)-grown silicon wafer had been investigated. To observe the effects of crystal-originated-particle (COP), vacancy-rich wafers and COP-free wafers were compared. In breakdown voltage (BV) measurement, breakdown fractions of vacancy-rich wafers were increased with the increase of oxide thickness (tOX) and showed a maximum value at the tOX range of 10–20 nm. On the other hand, COP-free wafers showed few breakdowns over all the range of tOX. Furthermore, time dependent dielectric breakdown (TDDB) of the vacancy-rich wafers showed higher extrinsic breakdowns than that of the COP-free wafers in the tOX below 20 nm. For the intrinsic breakdown, two groups showed the same charge-to-breakdown (QBD) along the strength of injection current over all the range of tOX. Especially, only in case of vacancy-rich wafer, abnormal increase of current, i.e., hump phenomena, was observed in the range of electric field below the Fowler-Nordheim (F-N) tunneling.


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